The introduction of the SMI handling code added in cset 9371 is

"reversed", as in it actually clears the SMI bit in the VMCB. If you
have a new enough chip (or new BIOS), the SMI bit HAS TO BE SET or it
gives exitcode -1.

Signed-off-by: Mats Petersson <mats.petersson@amd.com>

diff --git a/xen/arch/x86/hvm/svm/vmcb.c b/xen/arch/x86/hvm/svm/vmcb.c
index 2fb45896f5f31a63ca3fc26b430944a09c016b2b..8b46e104e5d9c934ba99d6d221fb08dfe89dde51 100644 (file)
--- a/xen/arch/x86/hvm/svm/vmcb.c
+++ b/xen/arch/x86/hvm/svm/vmcb.c
@@ -123,7 +123,7 @@ static int construct_vmcb_controls(struct arch_svm_struct *arch_svm)
           GENERAL1_INTERCEPT_RDTSC         | GENERAL1_INTERCEPT_PUSHF      |
           GENERAL1_INTERCEPT_SWINT         | GENERAL1_INTERCEPT_POPF       | 
           GENERAL1_INTERCEPT_IRET          | GENERAL1_INTERCEPT_PAUSE      |
-          GENERAL1_INTERCEPT_TASK_SWITCH   | GENERAL1_INTERCEPT_SMI
+          GENERAL1_INTERCEPT_TASK_SWITCH
         );
 
     /* turn on the general 2 intercepts */